index - Equipe Secure and Safe Hardware

 

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Mots clés

Side-channel attacks Temperature sensors Fault attacks Coq Side-channel attacks SCA Differential power analysis DPA Confusion coefficient Side-channel analysis SCA Elliptic curve cryptography FDSOI Intrusion detection Robustness Field Programmable Gates Array FPGA Energy consumption Masking TRNG Mutual Information Analysis MIA Routing Random access memory Reliability Resistance Circuit faults Dual-rail with Precharge Logic DPL Embedded systems Internet of Things Electromagnetic Writing Information leakage Security services Convolution Power demand Side-Channel Attacks Countermeasure Transistors GSM Cryptography Protocols Lightweight cryptography FPGA Sensors CPA Countermeasures Linearity Side-channel attack Application-specific VLSI designs Formal proof Masking countermeasure Computational modeling Hardware Field programmable gate arrays EMFI Estimation ASIC Magnetic tunnel junction SoC Logic gates Hardware security Side-Channel Analysis STT-MRAM Simulation Filtering Memory Controller Security and privacy Fault injection attack DRAM CRT OCaml Machine learning Switches AES Side-Channel Analysis SCA Receivers Differential Power Analysis DPA Reverse-engineering Asynchronous RSA PUF Defect modeling Image processing Process variation MRAM Costs Reverse engineering Dynamic range Power-constant logic Loop PUF Aging Randomness Fault injection Authentication Gem5 Security Training Voltage Neural networks Formal methods Signal processing algorithms Magnetic tunneling 3G mobile communication

 

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218

Références bibliographiques

435

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42 %

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