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A wide tuning range delay element for event-driven processing of low-frequency signals in 28-nm FD-SOI CMOS
Abstract : This paper presents a widely tunable digital delay element suitable for low-power low-frequency continuous-time digital signal processing systems. The design uses features of the 28 nm FD-SOI CMOS technology to precisely control currents in the pA range and significantly reduce leakage power. The measured tuning range is significantly larger than prior art covering more than 3 decades from 30 ns to 100 µs making it suitable for CT-DSP low frequency filters. At 0.7 V supply voltage, the dynamic power consumption is 15 fJ/event with a residual power consumption due to leakage of 14 pW.
https://hal.univ-lille.fr/hal-03041576
Contributeur : Andreas Kaiser <>
Soumis le : samedi 5 décembre 2020 - 11:59:43
Dernière modification le : mardi 18 mai 2021 - 11:14:04
Archivage à long terme le : : samedi 6 mars 2021 - 18:17:45
Contributeur : Andreas Kaiser <>
Soumis le : samedi 5 décembre 2020 - 11:59:43
Dernière modification le : mardi 18 mai 2021 - 11:14:04
Archivage à long terme le : : samedi 6 mars 2021 - 18:17:45
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