Characterization Method of SiC-JFET Interelectrode Capacitances in Linear Region - Université de Lille
Article Dans Une Revue IEEE Transactions on Power Electronics Année : 2016

Characterization Method of SiC-JFET Interelectrode Capacitances in Linear Region

Résumé

In order to study switching waveforms of a SiC-JFET, its interelectrode capacitances evolution is necessary when the power device is in linear region. In this paper, the reverse transfer capacitance C gd is at first characterized by the multiple-current-probe method and afterwards validated by the measurement with an impedance analyzer. The output capacitance Cossis measured by the same method and compared with the single-pulse characterization, which shows a huge increase of the apparent capacitance values in linear region. The influence of the power transistor internal gate resistor is thus studied, revealing the interelectrode capacitances measurement difficulties when the power device is in linear region. The characterization results are allowed to finely model the power transistor of which the switching behaviors are validated with the measurement in a buck converter.
Fichier principal
Vignette du fichier
Author_version_postprint.pdf (1.77 Mo) Télécharger le fichier
Origine Fichiers produits par l'(les) auteur(s)

Dates et versions

hal-03924459 , version 1 (05-01-2023)

Identifiants

Citer

Ke Li, Arnaud Videt, Nadir Idir. Characterization Method of SiC-JFET Interelectrode Capacitances in Linear Region. IEEE Transactions on Power Electronics, 2016, IEEE TRANSACTIONS ON POWER ELECTRONICS, 31 (2), pp.1528-1540. ⟨10.1109/TPEL.2015.2424320⟩. ⟨hal-03924459⟩
14 Consultations
24 Téléchargements

Altmetric

Partager

More